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Title:
ELEMENT REGION ISOLATION STRUCTURE OF SEMICONDUCTOR DEVICE AND ITS FORMATION
Document Type and Number:
Japanese Patent JP3275218
Kind Code:
B2
Abstract:

PURPOSE: To provide a means which facilitates the isolation of an element region from other element regions of a semiconductor layer even if a forward voltage is applied to the p-n junction of an element isolation region.
CONSTITUTION: A p-type semiconductor layer 3 and n-type semiconductor layers 41 and 42 are formed on an insulating film 2 on a silicon substrate 1. An insulating film 6 is formed on the semiconductor layers 3, 41 and 42. A plurality of p-type semiconductor layers 51 and 52 which reach the insulating film 2 are formed in a part which surrounds a Schottky barrier which is formed between an anode 7 and, for instance, the n-type semiconductor layer 41 among the p-type semiconductor layer 3 and the n-type semiconductor layers 41 and 42 and an element region which is a Schottky diode 71 composed of the n+-type region 8 of the n-type semiconductor layer 41 and a cathode 9 to form an element region isolation structure composed of a plurality of diodes. If necessary, some of the diodes are short-circuited to avoid a thyristor effect and some of the diodes are reversely biased to improve an element isolation function.


Inventors:
Kazunori Nishizono
Application Number:
JP17890193A
Publication Date:
April 15, 2002
Filing Date:
July 20, 1993
Export Citation:
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Assignee:
富士通株式会社
International Classes:
H01L21/761; H01L21/76; H01L27/12; H01L29/40; H01L29/41; H01L29/47; H01L29/872; (IPC1-7): H01L21/761; H01L27/12; H01L29/40; H01L29/41; H01L29/872
Domestic Patent References:
JP5821354A
JP5265689A
JP61231882A
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)