Title:
EMBEDDING MATERIAL AND MANUFACTURING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT USING IT
Document Type and Number:
Japanese Patent JP2004165595
Kind Code:
A
Abstract:
To provide an embedding material which realizes a semiconductor integrated circuit of high reliability without generating a deposition around an opening part of a via hole even when a recessed part wider than the via hole is formed by plasma etching, in the via hole filled with the embedding material.
A polymer in which a repeat unit is shown in formula (1) is used for the embedding material. In formula (1), R1 is a hydrogen atom, a fluorine atom, a chlorine atom, a bromine atom or a methyl group, R2 is a hydrogen atom, a 1-3C alkyl group or a 1-4C alkyl group whose hydrogen atom is replaced with at least one atom out of a fluorine atom, a chlorine atom and a bromine atom, and X is a group of -C(=O)O- or -S(=O)2O-.
Inventors:
KUMADA TERUHIKO
TOYOSHIMA TOSHIYUKI
NOBUTOKI EIJI
ISHIBASHI TAKEO
ONO RYOJI
SAKAI JIYUNJIROU
TOYOSHIMA TOSHIYUKI
NOBUTOKI EIJI
ISHIBASHI TAKEO
ONO RYOJI
SAKAI JIYUNJIROU
Application Number:
JP2003033316A
Publication Date:
June 10, 2004
Filing Date:
February 12, 2003
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
C08L33/04; C08F20/22; C08L63/00; H01L21/311; H01L21/312; H01L21/768; (IPC1-7): H01L21/768; C08F20/22; C08L33/04; C08L63/00
Attorney, Agent or Firm:
Kaneo Miyata
Yahei Takase
Yahei Takase