Title:
EMULATION MODULE
Document Type and Number:
Japanese Patent JP3049048
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To construct a circuit emulation device which increases the capability of an emulation engine.
SOLUTION: This emulation module including the increased number of emulation processors is logically reconstructed to plural planes which are mutually connected by multiplexers 70a to 70d in order to avoid the complexity of input- output pin outputs which is caused by the increase of numbers. An output driver 60 which aims at communication outside a board or outside a chip is connected to an N way output multiplexer 90. Similarly, an input receiver 50 receives an input from a source outside the chip or outside the board and gives the signal to the whole N way multiplexers 90 and the multiplexers 90 give an input signal to each array of the emulation processors. Thus, capability is increased without actually giving an impact upon the pin output connection problem of the chip or the module.
Inventors:
William F Besorail
Tak-Won Gu
Tak-Won Gu
Application Number:
JP7791999A
Publication Date:
June 05, 2000
Filing Date:
March 23, 1999
Export Citation:
Assignee:
International Business Machines Corporation
International Classes:
H01L21/82; G06F11/22; G06F11/25; G06F15/80; G06F17/50; (IPC1-7): G06F11/22; G06F15/16; G06F15/173; G06F17/50; H01L21/82
Domestic Patent References:
| JP7334384A | ||||
| JP7152722A | ||||
| JP6242261A |
Attorney, Agent or Firm:
Hiroshi Sakaguchi (1 person outside)
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