Title:
半導体素子用エピタキシャル基板および半導体素子
Document Type and Number:
Japanese Patent JP6944569
Kind Code:
B2
Abstract:
To provide an epitaxial substrate for semiconductor elements, which suppresses leakage current and has a high breakdown voltage.SOLUTION: An epitaxial substrate for semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN doped with Zn; a buffer layer formed of a group 13 nitride adjacent to the free-standing substrate; a channel layer formed of a group 13 nitride adjacent to the buffer layer; and a barrier layer formed of a group 13 nitride on an opposite side of the buffer layer with the channel layer therebetween. In the epitaxial substrate, part of a first region consisting of the free-standing substrate and the buffer layer is a second region containing Si at a concentration of 1×1017 cm-3 or more, and a minimum value of a concentration of Zn in the second region is 1×1017 cm-3.SELECTED DRAWING: Figure 2
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Inventors:
Mikiya Ichimura
Sota Maehara
Yoshitaka Kuraoka
Sota Maehara
Yoshitaka Kuraoka
Application Number:
JP2020114089A
Publication Date:
October 06, 2021
Filing Date:
July 01, 2020
Export Citation:
Assignee:
Nippon Insulator Co., Ltd.
International Classes:
H01L21/20; C30B29/38; H01L21/205; H01L21/338; H01L29/778; H01L29/812
Domestic Patent References:
| JP2012060110A |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Kazuki Nakao
Hiroyuki Kita
Takahiro Arita
Kazuki Nakao
Hiroyuki Kita