PURPOSE: To shorten the equalization time of a bit line as a whole at a semiconductor memory device by a method wherein, at a readout operation, the potential of the bit line at an L level is raised quickly.

CONSTITUTION: In a state that second and fourth switches Q1',..., Qn', Q1,..., Qn at a memory circuit are all set to ON, first switches T1,..., Tn are all set to ON, and a third switch T# is set to OFF. An electric current is made to flow to individual bit lines B1,..., Bn through a first interconnection L1 and the first switches T1,..., Tn from a power supply for equalization use. An electric current which is passed through the second switches Q1',..., Qn' and a second interconnection L2 and an electric current which is passed through the fourth switches Q1,..., Qn and a third interconnection L3 are made to flow from the bit lines at a low potential to the bit lines at a high potential.