Title:
EQUIPMENT AND METHOD FOR ORTHOGONAL FREQUENCY DIVISION MULTIPLEX COMMUNICATION
Document Type and Number:
Japanese Patent JP3048563
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To perform operation at a whose back rate such as minimizing the change of a hardware by using the set of a symbol length, quard time and N pieces of sub carriers in a first mode and using the same set of symbol length, quard time and N pieces of sub carriers in a second mode.
SOLUTION: An encoder circuit 1 receives a data stream, divides the data stream into the blocks of continuous groups or bits and introduces redundancy for forward error correction encoding. The block of encoded data bits becomes an input to a high-speed inverse Fourier transforming circuit of complex at N points (N is the number of orthogonal frequency division multiplex sub carriers.) While using phase shift keying of four phase, an IFFT is executed on 2N pieces of encoded data bit blocks received from the encoder circuit 1. A control circuit 4 controls a cyclic perfixer 3 and switches the guard time and symbol period as needed.
Inventors:
D.J.Richard
Application Number:
JP15799A
Publication Date:
June 05, 2000
Filing Date:
January 04, 1999
Export Citation:
Assignee:
Lucent Technologies, Inc.
International Classes:
H04J11/00; H04L5/14; H04L27/26; (IPC1-7): H04J11/00
Attorney, Agent or Firm:
Hirofumi Mitsumata
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