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Title:
ERASABLE TYPE READ OUT DEDICATED MEMORY
Document Type and Number:
Japanese Patent JPH04268296
Kind Code:
A
Abstract:

PURPOSE: To realize a high speed access by providing an EPROM in a cache memory which is operating at a high speed.

CONSTITUTION: A multiplexer 1 selects either the data stored in an EPROM section 5 or the data stored in a data memory 2 as the data to be transmitted to the external through a data bus 11. The data memory 2 temporarily stores a portion of the data which are stored in the EPROM section 5 as a cache memory and when the data, read out from the host device, are located in the data memory 2, no read out from the EPROM section 5 takes place and instead the read out is conducted from the data memory 2. An address tag comparator 4 judges whether the newly read out data from the host device as the data stored in the memory 2 or not and if the data are not located in the memory 2, discard the mostly not read out data, which are located in the memory 2, and the data are stored.


Inventors:
Miyazawa, Kiyoto
Application Number:
JP1991000029760
Publication Date:
September 24, 1992
Filing Date:
February 25, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C17/00; G11C16/02; G11C16/06; (IPC1-7): G11C16/06