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Patent Searching and Data


Title:
ERROR CORRECTING DEVICE FOR DIGITAL TRANSMISSION SYSTEM
Document Type and Number:
Japanese Patent JPH07336692
Kind Code:
A
Abstract:

PURPOSE: To improve picture quality by adding an. error correction code to header information to each hierarchy or an intra-frame encoding processed block.

CONSTITUTION: The bit stream of a video signal given variable length encoding processing by a source coding circuit 12 is supplied to an external encoding circuit 19, and after a header or a macroblock type is discriminated, and three kinds of the error correction codes set in conformity with the degree of importance of a video in a macroblock unit are added selectively on the basis of this discriminated result, it is packeted into fixed length N bytes, and is outputted to a multiplex circuit 20. This multiplex circuit 20 constitutes the frame of fixed length when a packet outputted from the external encoding circuit 19 reaches a prescribed number of pieces, and outputs it to an interleaving part circuit 15, and simultaneously, it adjusts the quantizing level of the source coding circuit 12 so that the required number of the macroblocks and mismatching loss in a frame become smaller.


Inventors:
HATANAKA SHINICHI
Application Number:
JP12501294A
Publication Date:
December 22, 1995
Filing Date:
June 07, 1994
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H04N19/50; G06T9/00; H04L1/00; H04N19/126; H04N19/146; H04N19/176; H04N19/503; H04N19/61; H04N19/625; H04N19/65; H04N19/70; H04N19/85; H04N19/91; (IPC1-7): H04N7/32; H04L1/00
Attorney, Agent or Firm:
Takehiko Suzue