To improve the error correction capability of LDPC codes.
According to an embodiment, an error correction decoder comprises: an inversion control section 146; a row processing section 142; and an amplification control section 147. The inversion control section 146 selects a variable node to be inverted from among variable nodes enumerated on an inversion node list, and performs an inversion process of inverting the sign of a posterior likelihood of the variable node to be inverted to temporarily update an input likelihood of the variable node to be inverted. After the inversion process is performed, the row processing section 142 repeatedly generates each external value from each input likelihood and each prior likelihood. If at least one check node of a temporarily estimated word does not satisfy parity, the amplification control section 147 performs an amplification process of amplifying the absolute value of the external value from the check node that does not satisfy parity to the variable node.
UCHIKAWA HIRONORI
| JP2009088720A | 2009-04-23 | |||
| JP2009182421A | 2009-08-13 |
| WO2006120844A1 | 2006-11-16 |
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Takashi Mine
Toshio Shirane
Sadao Muramatsu
Nobuhisa Nogawa
Kocho Chojiro
Naoki Kono
Katsu Sunagawa
Katsumura Hiro
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Takenori Masanori
Takuzo Ichihara
Yamashita Gen
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