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Title:
ERROR CORRECTION METHOD FOR MULTICARRIER RADIO TRANSMISSION SYSTEM
Document Type and Number:
Japanese Patent JPH0284836
Kind Code:
A
Abstract:

PURPOSE: To perform error correction even when deterioration occurs in a line partially by controlling each code attaching circuit for frame synchronization detection by a common frame counter, and inputting different carrier signals to each frame synchronization and error correction circuit.

CONSTITUTION: A code for frame synchronization detection is attached at each frame synchronization bit attaching circuit 2 on a transmission side, however, at this time, a position to attach the code for frame synchronization detection is controlled by the common frame counter 2A at the circuit 2. Therefore, the insertion position of the code for frame synchronization detection is set at the same position. On a reception side, the different carrier signals are inputted from each demodulation circuit 6 to each frame synchronization and error correction circuit 7. Thereby, since the different carrier signals are inputted to each circuit 7 even when a partial line out of radio transmission lines MC1 and MC2 is remarkably deteriorated, it is possible to establish frame synchronization from a non-deteriorated signal, and since no frame step out is generated in a deteriorated system, the error correction can be performed even in the deteriorated system.


Inventors:
HODOHARA KIYOAKI
Application Number:
JP23601088A
Publication Date:
March 26, 1990
Filing Date:
September 20, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L1/00; H04B7/15; H04L5/06; H04L7/08; H04L25/14; (IPC1-7): H04L1/00; H04L7/08
Domestic Patent References:
JPS60128735A1985-07-09
Attorney, Agent or Firm:
Yu Sanada