Title:
ERROR DETECTION DEVICE OF PACKET EXCHANGER
Document Type and Number:
Japanese Patent JPH08265370
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To accelerate processing such as error detection and correction by providing high exchange speed through block coding techniques for operating bus width with 24 bits and making data width into 16 bits at the executing time of common bus. SOLUTION: The input data of 16 bits are inputted to 1st and 2nd encoding parts 100 and 101 for 8 bits respectively, these bits and four code bits for error detection are encoded and the coded vector of 12 bits is generated. This vector is decoded through a common bus 102 by 1st and 2nd decoding parts 103 and 104, the error of one bit is detected and corrected, and the original data of 8 bits are extracted. Therefore, the decoding parts 103 and 104 can extract the original data of respectively reliable 8 bits from the input vector of respective 12 bits from the encoding parts 100 and 101.
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Inventors:
RI SEIZO
KEN EIJIYUN
KEN EIJIYUN
Application Number:
JP6100396A
Publication Date:
October 11, 1996
Filing Date:
March 18, 1996
Export Citation:
Assignee:
GENDAI DENSHI SANGYO KK
International Classes:
H04L1/00; H03M13/09; H04L12/70; (IPC1-7): H04L12/56; H04L1/00
Domestic Patent References:
| JPH0477148A | 1992-03-11 | |||
| JPH05136824A | 1993-06-01 |
Attorney, Agent or Firm:
Kensuke Isshiki (2 outside)
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