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Title:
ESTIMATING DEVICE
Document Type and Number:
Japanese Patent JP2005092532
Kind Code:
A
Abstract:

To provide an estimating device capable of estimating with high accuracy a loop structure path of a high execution frequency during program execution.

The estimating device is provided with a profiler table in which branch addresses serving as the addresses of branch instructions to be inputted branch destination addresses, and the number of times that each branch instruction is executed are stored as one entry in such a way that if the branch address and the branch destination address to be inputted are the same as the branch address and the branch destination address previously stored, the number of branches in each entry is updated, whereas if they are different, a new entry is added to store a branch history; a return branch destination table in which the branch destination addresses of return branches in the branch history stored in the profiler table and the number of branches thereof are stored as one entry; a determining means for determining either of the branch destination addresses stored in the return branch destination table as the head address; and an estimating means for estimating an instruction path of high execution frequency according to the head address for which the determining means is determined and the branch history in the profiler table.


Inventors:
MURAKAMI KAZUAKI
YOSHIDA MAKOTO
HAYASHIDA TAKANORI
Application Number:
JP2003325188A
Publication Date:
April 07, 2005
Filing Date:
September 17, 2003
Export Citation:
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Assignee:
FUKUOKA PREF GOV SANGYO KAGAKU
International Classes:
G06F11/28; G06F11/34; (IPC1-7): G06F11/28; G06F11/34
Attorney, Agent or Firm:
Nobuyuki Fujii
Nobutaka Fujii
Shigeo Fujii