Title:
EXAMINING METHOD FOR LSI WAFER
Document Type and Number:
Japanese Patent JPH01128381
Kind Code:
A
Abstract:
PURPOSE:To improve the accuracy of measurement on condition of a wafer by contacting a contact sheet which is formed by furnishing conductive bumps on a bendable film, to metal pads of an LSI water. CONSTITUTION:Conductive bumps 3 and a drawing-out wiring layer 4 connected to the bumps 3 are formed on a bendable film 2 to make a contact sheet. The examination of an LSI wafer 5 is carried out by contacting the bumps 3 to metal pads 6 of the water 5. Since the bumps 3 and the pads 6 can be contacted at an adequate pressure by the elasticity of the film 2 itself, and the pressure is not necessary to be too large, in such a composition, no large plastic deformation is given to the pads 6, and the contact frequency of the pads 6 can be increased. Moreover, the pads 6 can be made smaller than a probe needle, and can respond to a chip with inner pad. In such a composition, a measurement of a high accuracy and a high reliability on condition of the wafer can be carried out.
Inventors:
SAKAI TOSHIAKI
Application Number:
JP28631487A
Publication Date:
May 22, 1989
Filing Date:
November 12, 1987
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G01R31/28; G01R1/073; H01L21/66; H01R33/76; (IPC1-7): G01R31/28; H01L21/66; H01R33/76
Attorney, Agent or Firm:
Sadaichi Igita