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Patent Searching and Data


Title:
EXPOSING SYSTEM, METHOD FOR FABRICATING DEVICE, FACTORY FOR PRODUCING SEMICONDUCTOR AND METHOD FOR MAINTAINING ALIGNER
Document Type and Number:
Japanese Patent JP2003022962
Kind Code:
A
Abstract:

To enhance total throughput by optimizing the calibration timing while taking account of the operating conditions of an aligner and peripheral equipment, thereby utilizing the aligner effectively.

The exposing system comprises an aligner 23 for exposing a wafer, a unit 21 for treating the wafer variously before and after exposure, and a host computer 11 being connected with these units through a mutually communicable network and having calibration function of the aligner 23. The time required for the wafer treating unit 21 to perform each treatment before and after exposure and the time required for the aligner 23 to perform each treatment before exposure are measured previously by experiment for each production lot and stored. The host computer 11 predicts the time required for the aligner 23 and the wafer treating unit 21 to perform each treatment from the stored treating time and regulates calibration.


Inventors:
TAKANO SHIN
Application Number:
JP2001208958A
Publication Date:
January 24, 2003
Filing Date:
July 10, 2001
Export Citation:
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Assignee:
CANON KK
International Classes:
G03F7/20; H01L21/027; (IPC1-7): H01L21/027; G03F7/20
Attorney, Agent or Firm:
Tetsuya Ito