To accelerate memory access while performing error detection/ correction with a single error correcting means at an external storage device with which sector data are continuously accessed.
The sector data written by a host 2 are temporarily stored in a write buffer 7. When the sector data stored in the write buffer are odd- numbered sector data, a microprocessor 8 stores those data in a first memory 4 but when the sector data are even-numbered sector data, the microprocessor stores them in a second memory 5. When reading the sector data by the host 2, the N-th sector data read out of the first memory are outputted to a system bus by a data switching means 11 and at the same time, (N+1)th sector data (the sector data to be next read by the host computer) read out of the second memory are outputted to the error correcting means. Thus, the time required for the error detection and error correction of (N+1)th sector data is apparently shortened.
SHIODA SHIGEMASA
KATAYAMA KUNIHIRO
NAITO TOSHIYUKI