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Title:
FM送信回路及びオーバーサンプリング処理回路
Document Type and Number:
Japanese Patent JP5133172
Kind Code:
B2
Abstract:

To provide an FM transmitting circuit configured to suppress generation of harmonics due to nonlinear amplitude control processing for determining a maximum frequency shift when an audio signal is processed and also to significantly reduce a circuit scale and reduce power consumption as compared with a prior art.

The FM transmitting circuit includes a nonlinear amplitude control circuit 5 which performs amplitude adjustment for limiting the degree of modulation of a signal output from a pre-emphasis circuit 3, and an LPF 7 and an FM modulator 10 provided at a stage subsequent to the nonlinear amplitude control circuit 5. The DM transmitting circuit includes also a CIC up-sampler 4 provided between the nonlinear amplitude control circuit 5 and pre-emphasis circuit 3 and performing up-sampling at a predetermined up-sampling ratio using a predetermined number of stages of CIC filters, and a CIC down-sampler 6 provided between the nonlinear amplitude control circuit 5 and LPF 7 and performing down-sampling at a predetermined down-sampling rate using the CIC filters.

COPYRIGHT: (C)2010,JPO&INPIT


Inventors:
Shuji Kubota
Application Number:
JP2008229944A
Publication Date:
January 30, 2013
Filing Date:
September 08, 2008
Export Citation:
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Assignee:
株式会社リコー
International Classes:
H04B1/04; H03H17/00; H04H20/48
Domestic Patent References:
JP9181545A
JP6188751A
JP2002271143A
JP2002148289A
JP2007157191A
Attorney, Agent or Firm:
Mitsuo Tanaka
Kyousei Tamura
Masahiro Ishino



 
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