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Patent Searching and Data


Title:
FABRICATION OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2001068669
Kind Code:
A
Abstract:

To obtain a fabrication method of semiconductor device in which the impurity concentration is optimized in an extension region between a channel forming region and each source-drain region and the impurity concentration profile can be controlled with high accuracy.

The method for fabricating a semiconductor device having a region extended from each source-drain region comprises step (A) for forming a gate insulation film 20 and a gate electrode 21, step (B) for forming a source- drain region 23 by introducing impurities and then activating the introduced impurities by heat treatment, and step (C) for forming an extension region 25 in a semiconductor layer 10 by introducing impurities at least into the region of the semiconductor layer 10 for forming the extension region 25 and then activating the introduced impurities by heat treatment.


Inventors:
KOMATSU YUJI
Application Number:
JP24275499A
Publication Date:
March 16, 2001
Filing Date:
August 30, 1999
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/265; H01L21/336; H01L29/78; H01L29/786; (IPC1-7): H01L29/78; H01L21/336; H01L29/786
Attorney, Agent or Firm:
Takahisa Yamamoto