Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FABRICATION OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH09162163
Kind Code:
A
Abstract:

To obtain a layer to be etched having machining dimensions finer than the limit dimensions of the opening of a mask being patterned by an aligner in the fabrication of a semiconductor device.

A layer 21 to be etched is formed on a semiconductor substrate 11 and coated with a resist 31 containing a magnetic material and then the resist 31 is subjected to patterning through optical exposure. The semiconductor substrate is then placed in a parallel field and the flux of magnetic material in the resist 31 is arranged. Subsequently, the layer 21 is subjected to plasma dry etching using the resist 31 as a mask member. The plasma is deflected to the center of the opening of mask by the flux of magnetic material in the resist 31. According to the method, a layer 2 to be etched having machining dimensions smaller than the minimum exposure dimensions of resist 31 can be obtained thus realizing finer machining.


Inventors:
ICHIMURA HIDEO
Application Number:
JP32186795A
Publication Date:
June 20, 1997
Filing Date:
December 11, 1995
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L21/302; H01L21/3065; (IPC1-7): H01L21/3065
Attorney, Agent or Firm:
Hiroshi Maeda (2 outside)