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Title:
FAULT DETECTING DEVICE
Document Type and Number:
Japanese Patent JPH05342496
Kind Code:
A
Abstract:

PURPOSE: To reduce level conversion circuits in quantity, decrease the power, and easily confirm the normality of it in the fault detecting device requiring the level conversion of plural fault information.

CONSTITUTION: Input terminals 1, 3, and 5 accepting fault information by a ground signal are connected through relay contacts 31a-33a to a level conversion circuit 11. Input terminals 2, 4, and 6 are connected to a level conversion circuit 12 through relay contacts 31b-33b. A fault information reception circuit 22 controls the opening and closing of the relay contacts through a relay control circuit 23, and the signal level of plural input terminals can be converted in succession by one level conversion circuit. The normality of the level conversion circuit can be confirmed by inputting a pseudo fault information signal into the input terminal.


Inventors:
DOIWAKI SHINJI
Application Number:
JP14613692A
Publication Date:
December 24, 1993
Filing Date:
June 08, 1992
Export Citation:
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Assignee:
NEC CORP
International Classes:
G08B23/00; G08B25/00; G08C19/30; (IPC1-7): G08C19/30; G08B23/00
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
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