To detect the fault or malfunction of a memory or a control circuit for controlling the memory.

A fault detecting means 40 detects a fault at the data part of a memory 20 by comparing data written in a memory cell 21 of the memory 20 with data read out of the memory cell 21 and detects a fault at the address selecting part by cyclically writing respective data composed of plural patterns of different combinations into the respective memory cells 21 of the selected memory 20 and comparing the written data with the read data later. When no fault is detected at the address selecting part, the fault detecting means 40 successively increases the number of memory cells 21 to write the data of the same pattern so that the range of blocks of the memory cells 21 is successively expanded and the fault detection of the address selecting part is repeated.