PURPOSE: To detect the fault of hardware by detecting the error of data during the data transfer by adding a check bus, error bus and acknowledge bus.

CONSTITUTION: On the basis of external input data, error detection information is generated in the input interface part and then transmitted to the check bus. In the output interface part, this check bus information is collated with the data outputted from the central processor, and when an error is detected, an error signal is outputted to the error bus. The main memory part and input-output interface part, on the other hand, output a signal, which answers to the input-output access from the central processor, to the acknowledge bus. Then, the central processor detects the error of input data and generates error detection information to the output data; and then, when either this input data error information or error information from the error bus is received, or when no answer is received from the acknowledge bus line, and error interruption is caused to the central processor