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Title:
FAULT PORTION DISPLAY SYSTEM FOR DATA PROCESSOR
Document Type and Number:
Japanese Patent JPH05241865
Kind Code:
A
Abstract:

PURPOSE: To make the maintenance easier by immediately displaying the detection of an error by the lamp of a fault card in a data processor composed of plural cards when the detection is performed and to prevent, beforehand the fault at the subsequent operation time by immediately performing the error display even when this fault card is remounted on the processor.

CONSTITUTION: The fault portion display system of data processor is provided with check circuits 21 to 23 checking each operation corresponding to each logic circuit 11 to 13 on a card and when an error is detected in each circuit, the effect is stored in a memory 40 to be a nonvolatile memory via an OR gate 30. A driver 50 always monitors the content and turns a light emitting diode 60 on if an error display exists. As a maintenance person can easily and rightly exchange a fault card and the error display appears even if card which was once extracted as the fault card is erroneously diverted to other purposes, the error detection due to the remounting of the fault card after the repair and maintenance are performed can be prevented beforehand.


Inventors:
ARAI TOSHIMASA
Application Number:
JP32929791A
Publication Date:
September 21, 1993
Filing Date:
December 13, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F11/00; G06F11/30; G06F11/32; (IPC1-7): G06F11/00; G06F11/30; G06F11/32
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
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