Title:
FIELD EFFECT TRANSISTOR AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP2669325
Kind Code:
B2
Abstract:
PURPOSE: To provide a two-dimensional electron gas electric field transistor which has an even threshold voltage value and to provide a method for manufacturing such a transistor.
CONSTITUTION: On a semi-insulating GaAs substrate l, an undoped GaAs buffer layer 2, an undoped In0.2Ga0.8As channel layer 3, an Al0.2Ga0.8As electron feeder layer 4 which is doped into an n type, an undoped In0.5Al0.5 As etching stop layer 5, and a GaAs cap layer which is doped into an n type are grown. Then, a source electrode 7 and a drain electrode 8 are formed on the GaAs cap layer 6 by evaporation or by a heat treatment alloy process. Then, using an etchant including a succinic acid or tartaric acid, the GaAs cap layer 6 formed on the undoped In0.5Al0.5As etching stop layer 5 is selectively removed by etching to form a recess 9. A gate electrode 10 is formed in the recess 9. Since the depth of the recess can be controlled even, a threshold voltage value can be uniformed.
Inventors:
Kenichi Maruhashi
Application Number:
JP33055293A
Publication Date:
October 27, 1997
Filing Date:
December 27, 1993
Export Citation:
Assignee:
NEC
International Classes:
H01L21/306; H01L21/308; H01L21/338; H01L29/778; H01L29/812; (IPC1-7): H01L29/778; H01L21/306; H01L21/308; H01L21/338; H01L29/812
Domestic Patent References:
| JP555268A | ||||
| JP5275415A | ||||
| JP62244176A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)
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