Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FIELD-EFFECT TRANSISTOR AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH04120739
Kind Code:
A
Abstract:

PURPOSE: To enable a high-resistance layer in a re-growth interface of an InGaAs semiconductor to be reduced by forming a highly dense n-type impurities layer and an n-type active layer with InGaAs semiconductor and then equalizing the mixed crystal ratio of InAs at the interface.

CONSTITUTION: Be is doped as impurities onto a p-type In0.2Ga0.8As layer 3 by 3.0×1016/cm2 for forming a thickness of 3000. Si is doped as impurities onto an n-type In0.2Ga0.8As active layer 4 by 1.5×1019/cm2 for forming a thickness of 500. An undoped Al0.3Ga0.7As layer 5 is 100 thick and GaAs layer 6 is 50 thick. Then, after depositing an SiO2 film 36 on an entire surface, wet etching of the SiO2 film 36, the undoped GaAs layer 6, and the undoped Al0.3Ga0.7As layer 5 is performed. This wet etching process allows the n-type In0.2Ga0.8As active layer 4 to be exposed and may eliminate one part of the layer 4 in terms of wet etching depth.


Inventors:
KAGAYA OSAMU
HIRUMA TAKEYUKI
YAZAWA MASAMITSU
UMEMOTO YASUNARI
Application Number:
JP23982490A
Publication Date:
April 21, 1992
Filing Date:
September 12, 1990
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
HITACHI LTD
International Classes:
H01L21/205; H01L21/338; H01L29/812; (IPC1-7): H01L21/205; H01L21/338; H01L29/812
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)