Title:
電界効果トランジスタおよびその製造方法
Document Type and Number:
Japanese Patent JP4966153
Kind Code:
B2
Abstract:
A method for manufacturing a field effect transistor, includes: forming a mask of an insulating film on a semiconductor layer containing Si formed on a semiconductor substrate; forming the semiconductor layer into a mesa structure by performing etching with the use of the mask, the mesa structure extending in a direction parallel to an upper face of the semiconductor substrate; narrowing a distance between two sidewalls of the mesa structure and flattening the sidewalls by performing a heat treatment in a hydrogen atmosphere, the two sidewalls extending in the direction and facing each other; forming a gate insulating film covering the mesa structure having the sidewalls flattened; forming a gate electrode covering the gate insulating film; and forming source and drain regions at portions of the mesa structure, the portions being located on two sides of the gate electrode.
Inventors:
Tsutomu Tezuka
Eiji Toyoda
Eiji Toyoda
Application Number:
JP2007262344A
Publication Date:
July 04, 2012
Filing Date:
October 05, 2007
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L29/786; H01L21/28; H01L21/336; H01L21/8234; H01L21/8238; H01L27/08; H01L27/088; H01L27/092; H01L29/06; H01L29/78
Domestic Patent References:
| JP2001298194A | ||||
| JP200539171A |
Attorney, Agent or Firm:
Hirohito Katsunuma
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki