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Title:
FIELD-EFFECT TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND IMAGE DISPLAY APPARATUS
Document Type and Number:
Japanese Patent JP2009246342
Kind Code:
A
Abstract:

To provide a field-effect transistor manufactured by using a gate insulating layer having surface smoothness and low surface energy wherein sufficiently high charge carrier conduction performance is imparted to the field-effect transistor, to provide a method of manufacturing the field-effect transistor, and to provide an image display apparatus.

The field-effect transistor includes a substrate, a gate electrode formed on the substrate, the gate insulating layer formed on the gate electrode, an organic semiconductor formed on the gate insulating layer, and a source electrode and a drain electrode, wherein the gate insulating layer is a laminate of two or more layers and a gate insulating layer surface coming into contact with the organic semiconductor has an arithmetic mean roughness Ra or square mean roughness RMS of less than 0.3 nm.


Inventors:
ITO MASARU
Application Number:
JP2009038868A
Publication Date:
October 22, 2009
Filing Date:
February 23, 2009
Export Citation:
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Assignee:
TOPPAN PRINTING CO LTD
International Classes:
H01L29/786; H01L21/28; H01L21/312; H01L21/336; H01L29/417; H01L29/423; H01L29/49; H01L51/05
Domestic Patent References:
JP2008060117A2008-03-13
JP2007109798A2007-04-26
JP2007116170A2007-05-10
JP2007012986A2007-01-18
JP2009518260A2009-05-07
JP2007324288A2007-12-13
JP2004273678A2004-09-30
Foreign References:
US20080048184A12008-02-28
Attorney, Agent or Firm:
Takahashi Hayashi & Partners