To provide an enhancement type FET which has a relatively short distance between a gate and a channel layer and has a high gate forward breakdown voltage.
An n-type second carrier-supply layer 6 consisting of Al0.5Ga0.5As is formed in an upper surface of a channel layer 4 via a spacer layer 5. A barrier layer 78 which is constituted of a lower barrier layer 7 consisting of nondoped Al0.75Ga0.25As whose Al mole ratio is higher than the Al mole ratio of the second carrier-supply layer and an upper barrier layer 8 consisting of nondoped Al0.25Ga0.75As whose Al mole ratio is lower than the Al mole ratio of the lower barrier layer 7 is formed in an upper layer of the second carrier-supply layer 6. A gate electrode 100 is formed in an upper surface of the barrier layer 78 and is partially diffused to the upper barrier layer 8, thus forming a diffusion layer 100' in contact with the lower barrier layer 7.
KOBAYASHI ATSUSHI
Next Patent: COOLER