PURPOSE: To enable reduction of a source series resistance in a FET and formation of a channel concentration gradient practicably in mass production and excellently in reproducibility such that they have uniform activities by forming a gate part in a groove which is specifically formed by crystallographic anisotropic etching as a specific crystal face offset from the face 100 as a semiconductor substrate.

CONSTITUTION: An offset semiconductor substrate 21 is prepared which has a main face 21 that is inclined by a required angle θ about the crystal axis direction 110 from the crystal face 100. and a crystallographic etching groove 23, which is inclined by a required angle θ to the substrate face 21, is formed in the channel formation part of this substrate 21. Next, a gate 24 is provided in this groove 23, and both sides holding this gate between are made a source 25s and a drain 25d, and the source 25s and the drain 25d are made asymmetric in the sectional view of the groove 23 to the gate 24. Hereby, in formation of the groove 23 the crystal axis direction can be formed accurately about the specified crystal face, and an FET which is excellent in reproducibility and uniformity can be obtained.