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Title:
FIELD EFFECT TYPE TRANSISTOR
Document Type and Number:
Japanese Patent JPS5574176
Kind Code:
A
Abstract:

PURPOSE: To reduce capacity in island semiconductor layer on an insulating substrate by lowering the surface level more at the high concentration source and drain layers than at the semiconductor area forming the gate insulating layer.

CONSTITUTION: Te-containing n-type GaAs35 is formed on a Fe-containing insulating GaAs substrate 36, and Pt electrode 31 is formed on an anodi-oxidationally formed GaO layer 32. Further, a Zn-diffused p+-layers 33, 34 are formed with their main surface being formed at a level lower than the layer 35 having the gate insulating layer 32. The structure reduces the junction capacitance and decreases overlapping of the layers 33, 34 and the gate 31 although the source and drain layers 33, 34 have reached the surface of the insulating substrate 36. As such, this decreases both the source-to-drain junction capacitance and the capacitance due to overlapping of source-drain and gate-drain, thus answering the problem heretofore difficult to solve.


Inventors:
OKUTO YUUJI
Application Number:
JP14761778A
Publication Date:
June 04, 1980
Filing Date:
November 29, 1978
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L29/08; H01L27/12; H01L29/78; H01L29/786; (IPC1-7): H01L27/12; H01L29/08; H01L29/78
Domestic Patent References:
JPS51120677A1976-10-22



 
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