Title:
FIELD EMISSION ELEMENT AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP3819800
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make smaller an aperture of a gate hole formed by a photolithography with a photomask analyzer in a field emission element, reduce reactive power between a cathode conductor and a gate, and heighten withstand voltage.
SOLUTION: The cathode conductor 21 and a first insulating layer 31 are formed on a substrate 1 made of an insulating material such as glass, the gate hole 5 is formed in the first insulating layer 31 by the photolithography, a second insulating layer 32 is formed on the first insulating layer 31 and the cathode conductor 21 inside a gate hole 5, and the gate 22 and a peeling off layer 6 are formed by oblique deposition. Next, Mo is vapor-deposited from the vertical direction on the substrate 1 to form an emitter 4, and the peeling off layer 6 is peeled off. The second insulating layer 32 is formed with an insulating material having a dielectric constant larger than that of the first insulating layer 31.
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Inventors:
Takehiro Niiyama
Mitsuru Tanaka
Yuji Ohara
Mitsuru Tanaka
Yuji Ohara
Application Number:
JP2002105871A
Publication Date:
September 13, 2006
Filing Date:
April 08, 2002
Export Citation:
Assignee:
Futaba Electronics Co., Ltd.
International Classes:
H01J1/304; H01J9/02; H01J1/02; H01J3/02; H01J29/04; H01J31/12; (IPC1-7): H01J1/304; H01J9/02; H01J31/12
Domestic Patent References:
| JP2003123625A | ||||
| JP10208649A | ||||
| JP10308163A | ||||
| JP6162919A |
Attorney, Agent or Firm:
Masamitsu Ariga