FIELD FEECT TRANSISTOR AND MANUFACTURE THEREOF - NIPPON TELEGRAPH & TELEPHONE

Title:

FIELD FEECT TRANSISTOR AND MANUFACTURE THEREOF

Document Type and Number:

Japanese Patent JPS587879

Kind Code:

A

Abstract:

PURPOSE: To improve the accuracy of a gate electrode length by determining the length of a direction for coupling a source electrode to a drain electrode according to the thickness of a conductive layer as a laminar layer corresponding to a gate electrode.

CONSTITUTION: A laminar layer 4 having a window 3 at a single crystal semiconductor substrate 1 and a single crystal semiconductor layer 9 extending from the upper surface of the layer 4 in contact with the inner surface of the window 3 on the region faced with the window 3 are formed. The layer 3 is formed of a conductive layer 5, the first electrode 16 is ohmically contacted with the substrate 1, and the second electrode 13 is ohmically contacted with the layer 9.

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Inventors:

HORIGUCHI KATSUJI
SUDOU TSUNETAKA
KASAI RIYOUTA

Application Number:

JP10582881A

Publication Date:

January 17, 1983

Filing Date:

July 06, 1981

Export Citation:

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Assignee:

NIPPON TELEGRAPH & TELEPHONE

International Classes:

H01L29/78; H01L29/80; (IPC1-7): H01L29/78

Domestic Patent References:

JPS5131179A	1976-03-17
JPS5074384A	1975-06-19
JPS5132186A	1976-03-18

Attorney, Agent or Firm:

Shoji Tanaka

Next Patent: FIELD EFFECT SEMICONDUCTOR DEVICE