Title:
FIELD SERVICE BIT LINE NOR FLASH ARRAY
Document Type and Number:
Japanese Patent JP2018064083
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a field sub-bit line NOR (FSNOR) flash array and an operation method thereof.SOLUTION: A FSNOR flash array 400 is divided into multiple sectors 400i by selection transistors 46, 48 for connecting multiple even/odd sub-bit lines 41, 42 with a global main first metal bit lines Bn. In each FSNOR sector, two drain electrodes of a NOR element pair in adjoining rows form multiple even/odd sub-bit lines 41, 42 separated by multiple trench field oxide regions, and a common source electrode of multiple NOR element pairs in each row forms a diffusion common source line 43 connected with the first metal common source line via a metal contact. The FSNOR flash array 400 can enhance electrical separation of a selected NVM cell device and a not selected NVM cell device.SELECTED DRAWING: Figure 4
Inventors:
O RITSUCHU
Application Number:
JP2017093112A
Publication Date:
April 19, 2018
Filing Date:
May 09, 2017
Export Citation:
Assignee:
PEGASUS SEMICONDUCTOR BEIJING CO LTD
International Classes:
H01L27/11519; G11C11/56; G11C16/04; G11C16/08; G11C16/10; G11C16/14; G11C16/26; H01L21/336; H01L27/11524; H01L27/11565; H01L27/1157; H01L29/788; H01L29/792
Domestic Patent References:
| JP2014003043A | 2014-01-09 | |||
| JP2003068884A | 2003-03-07 | |||
| JP2000353391A | 2000-12-19 | |||
| JPH08297988A | 1996-11-12 | |||
| JPH11261039A | 1999-09-24 | |||
| JPH09331030A | 1997-12-22 |
Foreign References:
| US20040190335A1 | 2004-09-30 |
Attorney, Agent or Firm:
sk patent corporation
Akihiko Okuno
Hiroyuki Ito
Akihiko Okuno
Hiroyuki Ito