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Patent Searching and Data


Title:
FILTER CIRCUIT
Document Type and Number:
Japanese Patent JPS59208922
Kind Code:
A
Abstract:

PURPOSE: To eliminate clock leakage and to attain signal transmission free from noise by using a sampling/holding circuit which works on a switch signal having a frequency of (n) times as high as the switching frequency which drives a switched capacitor filter to eliminate the noise component of said filter.

CONSTITUTION: A noise component produced by the clock leakage is superposed on an output signal Vout, and this noise component is generated in response to the switching frequency of a 1/2 frequency dividing circuit 2i. Here the switching signal fO supplied to a sampling/holding circuit 3 corresponds to switching frequencies and - obtained from the circuit 2i. In other words, these frequencies and - are obtained by giving successively 1/2 division to the signal fO. As a result, the noise components superposed on the signal Vout are all eliminated through the circuit 3. Therefore, no noise component emerges at all to an output signal Vout' which is obtained from the circuit 3.


Inventors:
SATOU TETSUO
WATANABE TOSHIHIKO
Application Number:
JP8265383A
Publication Date:
November 27, 1984
Filing Date:
May 13, 1983
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03H19/00; (IPC1-7): H03H19/00
Attorney, Agent or Firm:
Akio Takahashi