PURPOSE: To decrease the chip size and to reduce the cost by switching a peak detection capacitor and a frequency of a clock to drive a switched capacitor filter (SCF) in time division.

CONSTITUTION: With a clock CP2 at a high level, a frequency component fH is extracted by the SCF 22, its peak value is given to a capacitor 26 and a capacitor 27 is in the holding state. On the other hand, with the clock CP 2 at a low level, a frequency component 3fH is extracted by the SCF 22, its peak value is given to the capacitor 27 and the capacitor 26 is in the holding state. Since the frequency components of fH, 3fH are obtained by time division, a tracking error signal SE being a difference of both detection output includes the frequency component of the clock but no problem arises therewith by selecting the frequency of the clock CP 2 sufficiently higher than the operating band of the detection output. Thus, the SCF 22 obtaines the peak value of the two frequency components.