PURPOSE: To simplify circuit configuration and to improve picture quality by providing a means to initialize first and second field memories while inhibiting the feedback of a data, which is written in the second field memory in advance, to an adding means during a specified period.
CONSTITUTION: An adder 11 integrates fixed pattern noise over plural frames, and this integrated fixed pattern noise is successively written in first and second field memories 12 and 13. When the fetch of the fixed pattern noise is started, an initializing circuit 15 initializes the first and second field memories 12 and 13 while inhibiting the input of the data, which is read out from the second field memory 13, to the adder 11 until the first fetched fixed pattern noise is written in the second field memory 13. Thus, the circuit configuration can be simplified, further, the circuit can be easily applied to a system having a noise reducer, and the picture quality can be improved.
KIJIMA TAKAYUKI
GOHARA MINORU
EHATA ATSUKO
