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Patent Searching and Data


Title:
FLASH MEMORY AND FLASH MEMORY CONTROL DEVICE
Document Type and Number:
Japanese Patent JPH08235894
Kind Code:
A
Abstract:

PURPOSE: To make the overhead reaching respective operations of an erasing, a writing and a read-in and the variation of access times for every chip small by providing areas where position management information of areas where users are accessible and areas where users are not accessible are stored with prescribed formats in a flash memory.

CONSTITUTION: A flash memory 100 is divided into n storage areas 101 to 10n and it an access to the memory 100, an erasing, a writing and a read-in are executed by making each area as one boundary. Position management information of areas where users in the same chip are accessible and areas where users are not accessible area stored with prescribed formats respectively in first and second areas and the third and the fourth areas and succeeding areas 103 to 106 are data storage areas where users can access freely. Thus, since the inspecting of storage areas as a pre-processing performing an access is made unnecessary, the overhead reaching respective operations is made small and the variation for every memory chip is made small.


Inventors:
AKIYAMA YASUHIRO
ARASAWA NOBUYUKI
TOTTORI TAKESHI
Application Number:
JP3967095A
Publication Date:
September 13, 1996
Filing Date:
February 28, 1995
Export Citation:
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Assignee:
HITACHI LTD
HITACHI MAXELL
International Classes:
G11C17/00; G11C16/06; G11C29/00; G11C29/04; (IPC1-7): G11C29/00; G11C16/06
Attorney, Agent or Firm:
Ogawa Katsuo