To stabilize processes for writing and erasing data, etc., and to prevent memory destruction by separately providing the power supply terminal of a power source control part and the power supply terminal of a circuit part of a control part, which operates with the same source voltage with the power source control part.

The flash memory 1, which operates with a single power source, controls a control voltage, used by a power source control part 4 for writing, erasure, verification, etc., of data, by a voltage boosting circuit and a stepping- down circuit to perform the writing, erasure, and verification for a memory element. When the source voltage applied to the power source control part 4 varies at this time, control voltages applied to the electrodes of respective memory elements from the boosting circuit and stepping-down circuit vary to cause various problem. For the purpose, since the power source terminal of the FVCC5 to the power source control part 4, which does not include a circuit causing large power source variation, is provided individually and separately from the power source terminal of the VCC6 to the control circuit 3 including a circuit which perform switching operation, the source voltage of the power source control part 4 becomes stable and hard to vary.