To attain a low voltage operation by providing a pull-down function to decrease the level of true/complementary input data of a latch hold circuit in response to supply of true/complementary clocks to a clock drive circuit.
Input data D, DB are amplified by transistors(TRs) Q51, Q52 of a data buffer 5 and amplified data DAB, DA are generated. When the clock C is at L and the clock CB is at H, TRs Q72, Q74 are conductive and TRs Q71, Q73 are nonconductive and TRs Q11, Q12 are respectively conductive or nonconductive depending on level of the amplified data DAB, DA to latch data. Conversely, when the clock C is at H and the clock CB is at C, TRs Q71, Q73 are conductive and TRs Q72, Q74 are nonconductive and TRs Q11, Q12 are respectively nonconductive depending on level of the amplified data DAB, DA to be pulled down and at L level to hold data.
YOSHIDA ATSUSHI
UEMURA MICHIHIKO
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