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Title:
FLIP-FLOP CIRCUIT
Document Type and Number:
Japanese Patent JPS5753136
Kind Code:
A
Abstract:

PURPOSE: To reduce the number of elements to be used, by controlling differential circuits by a common control source in a flip-flop circuit consisting of two bistable circuits which have two differential circuits respectively.

CONSTITUTION: Emitters of transistors TRs Q23 and Q24 of a master flip-flop 13 and TRs Q25 and Q26 of a slave flip-flop 14 are connected commonly and are connected to the collector of a multiemitter TR Q29. Emitters of TRs Q21 and Q22 of the master flip-flop 13 and TRs Q27 and Q28 of the slave flip-flop 14 are connected in common and are connected to collectors of TRs Q30 and Q31, and emitters of TRs Q30 and Q31 are connected to the collector of a TR Q32, which is a current source, together with the emitter of a TR Q29.


Inventors:
NAGATA MITSURU
Application Number:
JP12831480A
Publication Date:
March 30, 1982
Filing Date:
September 16, 1980
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H03K3/289; (IPC1-7): H03K3/289