PURPOSE: To speed up the shift operation for matching digits by controlling the system to overlap the generating operation of shift control data and shift operation.

CONSTITUTION: Shift control data SA1, SA2 for minute shift input a low-order bit of an exponent part of two floating decimal point data 1, 2 to an SA1, SA2 calculation circuit 11. When the SA1, SA2 signals are obtained, they are inputted to shift circuits 21, 31 and controlled for minute shift operation. The other shift control data is generated by inputting the high-order bit of the exponent part of the data 1, 2 to an SA3, SA4, TH and EX calculating circuit 12, and when signals SA3, SA4,... are obtained, they are inputted to shift circuits 22, 32 and controlled to attain coarse shift operation of multidigit. The input data to an adder 4 is obtained in a short time by executing the shift operation of the circuits 21, 31 and the operation of the circuit 12 in parallel in this way.