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Title:
FM DEMODULATION CIRCUIT
Document Type and Number:
Japanese Patent JPS639211
Kind Code:
A
Abstract:

PURPOSE: To increase the demodulation sensitivity by adding a circuit bringing a pulse width τcof an output wavefo/n of a pulse count circuit into a pulse width τc-at (At is a pulse interval).

CONSTITUTION: The 1st pulse generating circuit 11 comprising a monostable multivibrator generates a pulse having a constant pulse width τc at the leading of an input signal. The output of the circuit 11 is a pulse train of a prescribed pulse width τC and its pulse interval t is a function of an input frequency fin. Th pulse width of the input pulse τc is narrowered by a time proportional to the pulse interval t in the 2nd pulse generating circuit 12 to generate a pulse train having a width of τc-at. In integrating the pulse train through an LPF 13, the output is obtained as V0=E[(a+1)τcfin-a]. The demodulation band of the lower frequency side is narrowerd in the characteristic as shown in figure and the demodulation sensitivity is increased by a multiple of (a+1) by the narrowered value. Thus, when an input signal with a comparatively narrower band is used, the titled system is advantageous.


Inventors:
YOSHIZAWA SHIGEO
ISHII HIDEKAZU
Application Number:
JP15066286A
Publication Date:
January 14, 1988
Filing Date:
June 28, 1986
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03D3/00; H03D3/04; H03K9/06; H03K17/66; (IPC1-7): H03D3/00
Domestic Patent References:
JPS56169462A1981-12-26
JPS6113804A1986-01-22
JP54163858B
JPS5961312A1984-04-07
Attorney, Agent or Firm:
Ashida Tan