PURPOSE: To simplify IC-implementation by applying a FM signal, which should be detected, to a serial input type shift register.

CONSTITUTION: In the sub-channel sound detection circuit of a TV reciever, serial input type shift register 5 is so constituted that clock signal (b) of approximate 1MHz will be applied from divider circuit 4 to JKFFs F1 to F4. Since F1 is inverted according to output (a) of amplifier-limiter circuit 2 when signal (b) falls, F1 outputs signal (c) delayed from output (a) by the pulse width of (b) when the rise or fall of output (c) is at its maximum. Then, signal (c) and original signal (a) are applied to exclusive-OR circuit 7 to obtain output signal (d) and, in consequence, this signal (d) is integrated by integrating circuit 8, so that sound detection output (e) can be obtained which corresponds to the coarseness of the original FM signal.