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Title:
FOCAL PLANE-ARRAY
Document Type and Number:
Japanese Patent JPH05198848
Kind Code:
A
Abstract:
PURPOSE: To integrate an array with an electronic circuit, so as to reduce the production cost by attaching a thermo sensitive array to a semiconductor chip having an electrical connecting region on an electronic circuit, forming an aero-gel for insulation in a passage between the chip and the array, and conductively interconnecting the connecting region on the chip to the array along the passage. CONSTITUTION: A pixel 1 contains an integrated circuit 3, and an aero-gel layer 5 as thermally insulating material is fitted thereto, and a detector array to be formed thereon the integrated circuit 3 are thermally isolated. Next, a passage 7 is formed in the layer 5, and an electrical conductive material 9 which extends to a pad on the circuit 3 or other connecting regions, and the upper side of the layer 5, is formed therein. Further, an electrode-type infrared frequency reflecting layer 11 is formed on the insulation layer 5 and attached in the passage 7, and it is connected to the material 9 which extends to the connection regions or pad on the circuit 3. Then a detecting material layer 13 is formed on the layer 11, and a translucent electrode 15 is fitted thereto.

Inventors:
HAWAADO AARU BERATAN
DANA DATSUDORII
CHIYAARUZU EMU HANSON
Application Number:
JP22600492A
Publication Date:
August 06, 1993
Filing Date:
August 25, 1992
Export Citation:
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Assignee:
TEXAS INSTRUMENTS INC
International Classes:
G01J1/02; H01L37/02; (IPC1-7): G01J1/02; H01L37/02
Attorney, Agent or Firm:
Akira Asamura (3 outside)



 
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