To use deeper source/drain contact regions without affecting gate overlapping by forming on a substrate a first region covered by a first insulating layer and a conductive layer, and a second region covered by the first insulating layer.
A field-effect transistor is formed on a substrate consisting of at least a first portion and at least a second portion. The first portion defines a first region being covered with an amorphous silicon layer 2 and a gate dielectric stack. The second portion defines a second region being covered with at least a single insulating layer 1. The substrate is a wafer or a slice of a semiconductor, such as a Ge, GaAs, Ge or SiGe semiconductor, either partially processed or unprocessed. Particularly, if the substrate is a partially processed wafer or a slice, at least a part of an active and/or passive element may be formed thereon in advance.
DEFERM LUDO
BECKX STEPHAN
SERGE VAN HEEREMEERUSUFU
