Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FORMATION OF GATE ELECTRODE
Document Type and Number:
Japanese Patent JPS63283063
Kind Code:
A
Abstract:

PURPOSE: To prevent the gate breakdown voltage from deteriorating by a method wherein a film thickness of a natural oxide film formed at an interface between a Ti-Si alloy layer and a substrate layer is made extremely thin.

CONSTITUTION: The surface of a silicon substrate 31 is oxidized; a gate oxide film 33 is formed. Then, an undoped polysilicon layer 35 is formed on the gate oxide film 33. Then, a thickness direction of the polysilicon layer 35 is made single-crystalline; a single-crystal silicon layer 37 becomes a substrate layer. Then, an upper layer 39 composed of a Ti-Si alloy layer or a Ti layer is formed on the surface of the cleaned substratum layer 37. Then, the TiSi2 layer 39 and the P-doped single crystal layer 37 are patterned to be a shape of a gate electrode; the gate electrode 41 composed of a P-doped single-crystal silicon electrode 37a and a TiSi2 electrode 39a is obtained. Then, an oxide layer 43 is formed in a region including the surface of the gate electrode 41. Then, source and drain regions 45 are formed.


Inventors:
ISHIDA TOSHIMASA
Application Number:
JP11766687A
Publication Date:
November 18, 1988
Filing Date:
May 14, 1987
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L21/3205; H01L21/8242; H01L23/52; H01L27/10; H01L27/108; H01L29/78; (IPC1-7): H01L21/88; H01L27/10; H01L29/78
Attorney, Agent or Firm:
Takashi Ogaki