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Title:
FORMATION OF LOW RESISTANCE OHMIC CONTACT
Document Type and Number:
Japanese Patent JPH023284
Kind Code:
A
Abstract:

PURPOSE: To surely form a low resistant ohmic contact on an ntype GaAs substrate without applying hard heat treatment by restraining the surface depletion by pinning at fermi level by the surface level of InGaAs to about 10 by planar doping to the surface of the InGaAs.

CONSTITUTION: An n-type InGaAs layer that the mole ratio of In is 0.3 or more is formed, with an n-type InGaAs layer 103 that the mole ratio of In is gradually increased to the desired value from the GaAs substrate side between, on a GaAs substrate 102, and n-type dopant is planar doped in 2×1013+2cm or more on the surface of said n-type InGaAs layer that the mole ratio of In is 0.3 or more. The n-type dopant such as Si, Sn, etc., enters group III site efficiently in InGaAs, and unlike the case to GaAs, high concentration doping becomes possible. Accordingly, it becomes possible to form a high concentration doping layer at the surface by planar doping to the InGaAs surface, and the effect of pinning can be restrained efficiently.


Inventors:
OBARA MASAO
Application Number:
JP15008988A
Publication Date:
January 08, 1990
Filing Date:
June 20, 1988
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L29/73; H01L21/28; H01L21/331; H01L29/205; H01L29/43; H01L29/72; H01L29/737; (IPC1-7): H01L21/331; H01L29/205; H01L29/46; H01L29/72; H01L29/73
Attorney, Agent or Firm:
Noriyuki Noriyuki (1 person outside)



 
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