Title:
FORMATION METHOD OF INTERCONNECTION
Document Type and Number:
Japanese Patent JP2712916
Kind Code:
B2
Abstract:
PURPOSE: To etch and remove an insulating film other than in parts whose insulation is required without damaging the surface by a method wherein a substrate prior to a patterning operation is coated sequentially with a special material thin film and with an insulating film which is changed into the insulating film by a heating operation the substrate is cleaned after an interconnection has been patterned and only the insulating film under the patterned interconnection is left.
CONSTITUTION: The surface of a silicon LSI substrate 6 having an exposed interconnection is coated with a special material-based thin film 13; the thin film is formed; after that, an OCD (Si-20000-SG made by Tokyo Oka) is coated; a film composed of a raw material 5 for silicon-oxide film formation use is formed. Then, a part in which a silicon oxide film is to be formed is irradiated with an Ar laser 1 in a raw- material gas W (CO)6 12 for W-film formation use; the irradiated part is heated; a W-film is formed. At the same time, the raw material for silicon-oxide film formation use under the W-film is heated; it is reformed to a silicon oxide film. Then, the film is cleaned-with alcohol; the raw material for silicon-oxide film formation use in a part other than the irradiated part is etched off; a silicon oxide film is formed locally between the substratum interconnection and the deposited W.
Inventors:
Yuko Seki
Yukio Morishige
Yukio Morishige
Application Number:
JP21875491A
Publication Date:
February 16, 1998
Filing Date:
August 29, 1991
Export Citation:
Assignee:
NEC
International Classes:
H01L21/3205; H01L21/285; H01L23/52; H01S3/00; (IPC1-7): H01L21/3205; H01L21/285; H01S3/00
Domestic Patent References:
| JP4293238A | ||||
| JP4336433A | ||||
| JP4355913A | ||||
| JP4372123A |
Attorney, Agent or Firm:
Shuichi Fukuda (2 outside)