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Title:
FORMING METHOD OF THIN FILM TRANSISTOR
Document Type and Number:
Japanese Patent JPH04125936
Kind Code:
A
Abstract:

PURPOSE: To exclude the overlapping parts between electrodes of a base, a source, and a drain, and reduce capacitances between the electrodes, by diffusing impurities by the effect of temperature rise of a semiconductor layer caused by projecting laser light from the substrate side while using a gate electrode as a mask.

CONSTITUTION: A gate insulating film 4, a semiconductor layer 3, a impurity containing layer 7 are formed in order on a gate electrode 2 on a substrate 1. From the substrate 1 side, laser light 11 is projected; the impurities in the layer 7 are diffused in the semiconductor layer 3 by the effect of temperature rise in the layer 3, thereby forming a source.drain region, on which a source electrode 5 and a drain electrode 6 are formed. The temperature rise caused by the laser light 11 is restricted within a region which does not overlap at all with the gate electrode 2 irradiated with the laser light 11 while the gate electrode 2 is used as a mask, so that overlapping parts between the gate electrode and the source and the drain electrodes are not generated. Thereby capacitances between electrodes are reduced, and the rise time characteristics of a gate signal can be improved.


Inventors:
TOYODA YOSHIHIKO
Application Number:
JP24847190A
Publication Date:
April 27, 1992
Filing Date:
September 17, 1990
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/20; H01L21/336; H01L29/78; H01L29/786; (IPC1-7): H01L21/20; H01L21/336; H01L29/784
Attorney, Agent or Firm:
Masuo Oiwa (2 outside)



 
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