To generate a precise fraction frequency division signal irrespective of precision of a decimal part of a frequency-divided number.
A cumulative adder 7 performs cumulative addition of a decimal value f set in an f setting part 8 in response to division output DOUT. An adder 1 adds a value of an integer part n of an n setting part 12 and an integer part ADI of an addition result of the cumulative adder 7. A frequency divider 11 frequency-divides an optional frequency signal ck by using a result calculated by an adder 11 as a frequency-division number. An n frequency-division counter 3 counts frequencies by which n frequency division is performed and an n+1 counter counts frequencies by which n+1 frequency division is performed based on presence/absence of a carry signal ADI of the integer part of the cumulative adder 7 in response to the output DOUT of a frequency divider 1. A selector 10 fixes an output signal SEL of a cumulative addition result as 1 when the n frequency-division counter 3 becomes Mn, resets the n frequency-division counter, the n+1 frequency-division counter and the cumulative adder 7 and sets the output signal SEL as 0 when the n+1 counter 6 becomes Mn+1.
Satoshi Kono
Makoto Nakamura
Kurata Masatoshi
Sadao Muramatsu
Ryo Hashimoto