PURPOSE: To reduce the number of address lines so as to simplify the circuit of the title converter by using a serial access memory (SAM) as a means which stores the one-frame data of digital communication signals.

CONSTITUTION: SAMs 8 and 8' alternately perform write and readout operations at every prescribed time intervals (at every one frame). When the SAM 8 makes write operations, an input controlling timing signal 109 generated by an input controlling timing signal generation circuit 9 is selected at a selection circuit and given to the SAM 8 as an input-output timing signal 111. The SAM 8' also performs similar operations and performs write/readout operations in corresponding to the write/readout operations of the SAM 8. Therefore, a prescribed quantity (prescribed number of bits) can be collectively written in a memory cell and collectively read out from the memory cell.